Design and implementation of DC source fed improved dualoutput buckboost converter for agricultural and industrial applications
Sathish Kumar Shanmugam^{1} , Arumugam Senthilkumar^{2}
^{1}Jansons Institute of Technology, Coimbatore, Tamilnadu, India
^{2}Sri Shanmugha College of Engineering and Technology, Salem Tamilnadu, India
^{1}Corresponding author
Journal of Vibroengineering, Vol. 19, Issue 8, 2017, p. 64336454.
https://doi.org/10.21595/jve.2017.19228
Received 3 October 2017; received in revised form 26 October 2017; accepted 4 November 2017; published 31 December 2017
JVE Conferences
The proposed research involves, a design and implementation of DC source fed improved Dual output BuckBoost converter for agricultural and industrial applications. It consists of step up and stepdown converter, DClink module. Compared with conventional two converters, the designed system results in reduction of voltage tension across the switches, compact power switches, DC source reckoning and reduced inrush current. DClink switching is achieved by reduced ripple voltage which results in improved quality of obtained output power. Reduction in switch count makes the system more cost effective. In addition, the motor speed is regulated by PI controller. Brushless DC Motor produce torque ripple and cause mechanical vibration, acoustic noise due to structural imperfectness and control system, to overcome this suppression control method of vibration for brushless DC motor utilizing feedforward compensation with Fourier transform utilizing a vibration signal acquired by an acceleration sensor attached to the motor frame is proposed. A simulation and prototype model of Dual output BuckBoost converter is developed, and its performance is analysed for various operating conditions.
Keywords: DOBB, symmetrical/asymmetrical, ripple voltage, efficiency, losses, vibration, Fourier transform.
1. Introduction
1.1. Single stage multiport converter
By combating with the challenges of global warming, clean energies, like fuel cell, PV and wind energy have been highly encouraged because of its high their efficiency. Owing to the electrical properties of clean energy, the power generated is severely impacted by the climate or it has transient responses that are slow, and the output voltage is easily affected by load changes [1]. Further, the other auxiliary components, like storage elements, control boards and so on are generally necessary to guarantee the right operation of clean energy [2]. Therefore, different voltage levels are needed in the power converter of a clean energy generation system. Generally, several single input single output (SISO) DCDC converters with diverse voltage gains are integrated to meet the demands of different voltage levels, such that their system control is more complex and the respective cost is high [3]. The synthesis of multiport converters can be done by connecting different SISO converters to one common dc bus as illustrated in Fig. 1. Though common in traditional hybrid power systems, such kind of configuration can result in a sophisticated structure and huge cost. The inspiration behind the present study is to develop a single input multi output (SIMO) converter for maximizing the conversion efficiency and voltage gain, decreasing the control complexity and helping to save the manufacturing expense of the converter.
SIMO converters can be divided into isolated and nonisolated configurations. In the case of isolated topologies, a transformer with multiple secondary windings acts as an interface between the input and output ports. Only one output voltage generally the one with the heaviest load is controlled while the others are decided by means of the turn ratios of the secondary windings. Therefore, independent output voltage regulation is not a direct impression, and this is not a costefficient solution also [4]. The nonisolated SIMO topologies can be further divided into independent and seriesoutput configurations. With the independentoutput configuration [5, 6], every output port shares the same ground and decreases the number of external heavy components like inductors and power switches, resulting in reduced expense and losses in the system. However, in these configurations, loads are constructed independently as illustrated in Fig. 2(a).
Fig. 1. Conventional multiport converter architecture
In a similar manner in the seriesoutput configuration [7, 8], as indicated in Figs. 2(b) and (c), various outputs are connected serially. Series regulated DC voltages might be necessary in several low and highpower applications. One among the most remarkable applications of this new family of DCDC converters is the boosting and regulation of the low and variable output voltage of renewable energy for the DC link of grid/load connected systems on the basis of inverters. Therefore, Seriesoutput SIMO converters are considered to be effective solutions in balancing the dclink voltage of loads in an effective manner [9].
Nami et al. [6] have introduced a novel DC–DC multioutput boost converter that can share its total output between the different series of output voltages used in low and highpower applications. Unluckily, nearly two switches for one output are needed, and DCDC multioutput control mechanism was complex. In addition, the associated output power cannot provide individual loads in an independent way. Boora et al. [8] also have illustrated a novel multioutput DCDC converter topology, which has the capabilities of stepup and stepdown conversion. In this topology, multiple output voltages could be produced and could be utilized in varied applications like multilevel converters with diodeclamped topology or power supplies with different voltage levels, but the multiple number of switches in the converter results in power losses. Patra et al. [10] have introduced a SIMO DCDC converter with the capability of producing buck, boost, and inverted outputs simultaneously. Nonetheless, approximately three switches for one output are needed for SIMO.
In addition, in this research paper, we propose a suppression control method for torque vibration of brushless DC motors utilizing the acceleration sensor, the Fourier Transformer and the repetitive controller. In the proposed system, only one frequency component of vibration signal from acceleration sensor is inputted to repetitive controller, the stability of the control system can be improved. Approximate analysis is performed to study the stability of the repetitive control system. In order to realize online generation of feedforward compensation signals to reduce the vibration, autotuning method of the repetitive control parameters is also presented.
The periodical torque ripple occurs synchronously with the motor rotation. And also, the repetitive controller has large loop gain (basically infinity) only for the fundamental repetitive frequency component and its harmonics. For the above reasons, the repetitive control system is effective to reduce the vibration due to periodical torque ripples.
Fig. 2. Nonisolated SIMO: a) boost converter independent output configuration [7], b) boost converter series output configuration [7], c) BB converter series output configuration [8], d) schematic diagram of control system
a)
b)
c)
d)
However, because the vibration signals detected by the acceleration sensor contain various frequency components and the mechanical system around the motor and load has complicated resonant characteristics, we cannot stabilize the repetitive control system and reduce the vibration by directly using the vibration signals from sensor [11]. Then, we investigate the method which only one frequency component of the vibration signal is extracted from the vibration signals detected by the acceleration sensor, and the repetitive control is performed for every frequency component of the vibration. Generally, since the period of the vibration may not coincide with that of the power supply but may be multiple of that, we set the period of the vibration to $Tr$ ($=Nr$$T$, $T=f1$, $f$: motor driving frequency). For example, in the case of $Nr$ = 2, the frequency components of the vibration are 0.5, 1.0, 1.5 and 0.5 is fundamental wave component of the vibration.
2. Materials and methods
2.1. Operation of the proposed DOBB converter
Fig. 3 illustrates the newly introduced single input multioutput topology that can carry out both of the step up and stepdown conversions. DOBB converter offers versatility due to its capabilities in improving the dynamic response during the input voltage and load disturbances. Moreover, for applications where in there is a prior information or predictability regarding the load or input voltage disturbance, DOBB possesses the capability to eliminate the impact of these disturbances from the output voltages. Further, the new topology might act as sign priorities to the output voltages in order to attain a better dynamic performance in which the sensitive loads are provided in addition to loads that frequently vary.
Fig. 3. Proposed DOBB converter
In the present research, a DOBB converter topology is suggested with the following significant features.
• Any number of passive loads could be included.
• DOBB can work both in Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM).
• The power supplied by input DC source can be controlled; therefore, the power budgeting between input energy source and load can be combined.
• DOBB uses only a single inductor that can help in reducing the complexity and the expense of the system in addition to simplifying the current sensing.
• The output voltages can be greater compared to the maximum input voltage or lesser in comparison to the minimum input voltage.
• Possibility of a symmetrical or asymmetrical voltage balancing of output capacitor voltage is present in this DOBB converter.
In Fig. 3, the new converter with SingleInput TwoOutput is illustrated. This circuit comprises a BB switch (${S}_{1}$), power sharing switch (${S}_{2}$), two power diodes (${D}_{1}$ and ${D}_{2}$), a single BB inductor (${L}_{1}$), intermediate capacitor (${C}_{1}$) and output capacitors (${C}_{01}$ and ${C}_{02}$) with two different kinds of loads (${R}_{1}$ and ${R}_{2}$). As shown in the above figure, (${R}_{1}$) and (${R}_{2}$) refer to the model of load resistances, which can indicate the equivalent power supplying 40 W load. Two power switches,${S}_{1}$ and ${S}_{2}$, in the converter structure act as the chief controllable elements, which regulate the power flow and the output voltages of the converter. For every switch, a certain responsibility are given. The BB switch (${S}_{1}$) is active in order to control the inductor (${L}_{1}$) current to the value desired. Actually, S1 controls the capacitor (${C}_{01}$) voltage to the necessary value by regulating the inductor (${L}_{1}$) current. Control of the total output voltage (${V}_{out}={V}_{01}+{V}_{02}$) to necessary value is the responsibility of the power sharing switch (${S}_{2}$). Gate signals of switches and the current waveforms of inductor, switches, diodes and capacitors are illustrated in Fig. 4. Based on the states of the switches, there are three various operation modes in the whole switching period as shown below.
Fig. 4. Key waveforms of the proposed DOBB converter
2.1.1. Switching state 1 [
In switching state 1, the switch (${S}_{2}$) is turned ON. As (${S}_{2}$) is ON, diodes (${D}_{1}$ and ${D}_{2}$) are reverse biased, therefore the switch (${S}_{1}$) is turned OFF. The equivalent circuit of the new converter in this state is illustrated in Fig. 5. In this switching state, an inductor (${L}_{1}$) current charges the capacitor (${C}_{1}$) so that the inductor current reduces and capacitor (${C}_{1}$) current faces a rise. Moreover, in this mode, capacitors (${C}_{01}$ and ${C}_{02}$) get discharged and supply their stored energy to the load resistances (${R}_{1}$ and ${R}_{2}$) correspondingly as illustrated in Fig. 4. In this mode the inductor and capacitor current and voltage are expressed by Eq. (1) below:
Fig. 5. Switching state 1 [$0$to${t}_{0}$(or)${t}_{1}$to${t}_{2}$]
2.1.2. Switching state 2 [
In switching state 2, switch (${S}_{1}$) is turned ON. As (${S}_{1}$) is ON, diode (${D}_{2}$) gets forward biased so that the switch (${S}_{2}$) is turned ON/OFF. The equivalent circuit of the converter proposed in this state is illustrated in Fig. 6. In this state of switching input DC source (${V}_{in}$) charges the inductor (${L}_{1}$), and hence the inductor current sees an increase. At the same time, intermediate capacitor (${C}_{1}$) and input dc source (${V}_{in}$) delivers/discharges its energy to the output capacitor (${C}_{02}$) through diode (${D}_{2}$). In addition, in this mode, capacitors (${C}_{01}$ and ${C}_{02}$) get discharged and their stored energy is delivered to the corresponding load resistances (${R}_{1}$ and ${R}_{2}$) as illustrated in Fig. 4. In this mode, the current and the voltage of the inductor and capacitors are expressed as in Eq. (2) below:
Fig. 6. Switching state 2 [${t}_{0}$to${t}_{1}$]
2.1.3. Switching state 3 [
In switching state 3, both the switches (${S}_{1}$ and ${S}_{2}$) are turned OFF. Therefore, the diode (${D}_{1}$) is forward biased. The equivalent circuit of the new converter in this state is illustrated in Fig. 7. In this switching state, an inductor (${L}_{1}$) current charges the capacitor (${C}_{01}$), hence the inductor current reduces and capacitor (${C}_{01}$) current rises. In addition, in this mode, capacitors (${C}_{01}$ and ${C}_{02}$) get discharged and supply their stored energy to the respective load resistances (${R}_{1}$ and ${R}_{2}$) as illustrated in Fig. 4. The current and voltage of the inductor and capacitors are expressed by Eq. (3) below:
From the above Eqs. (1), (2) and (3) it is noted that the capacitor, inductor charges/delivers the voltages at different switching modes of operation.
Fig. 7. Switching state 3 [${t}_{2}$to${t}_{3}$]
2.2. Control strategy of DOBB converter
The control mechanism is designed in order to achieve a stable voltage and control current storage capability of the topology in order to improve the dynamic response of the converter during the application of the load or input voltage disturbances. In the situation of rise in input voltage or drop in load current that may result in overvoltage in the output, closed loop regulation that senses the actual output voltage of the system and then activates the power switches in order to deviate the inductor current from the load and to eliminate the overvoltage is required. The case of drop in input voltage or rise in load current is also solved by using of closed loop control strategies. The contribution done by the present research depends up on the SIMO DOBB converter by selecting a classical Proportional Integral (PI) controller for a closed loop control strategy. The PI controller attempts to precise the error among the measured process variables and the desired set point through calculation and then provides an accurate output, consequently it can control the conversion process.
The PI controller computation involves two unique modes: proportional mode and integral mode. In the proportional mode, the reaction to the current error is decided, but in the integral mode, the reaction based recent error is decided. The weighted sum of the two modes provides the output to be the corrective action to the control element. PI controller is widely applied in several industries due to its simple design and unsophisticated structure. PI controller algorithm can be run by Eq. (4):
where means $err\left(t\right)=$ set voltageactual voltage.
A voltage follower approach is adjustable for controlling the DOBB converter when it operates with DCM. A dual voltage sensors, i.e. total output voltage and capacitor (${C}_{01}$) voltage measurement sensors, is necessary for regulating output voltage of the DOBB converter. Fig. 8 presents a closed loop control of the DOBB converter. This control strategy comprises a voltage error generator, Output Voltage Controller (OVC), Capacitor Voltage Controller (CVC) and a PWM generator.
The error generator of OVC compares of the preferred output voltage (${V}_{out}^{*}$) of DOBB converter with the original output voltage (${V}_{out}$) for generating an error voltage (${V}_{ce1}$), provided in Eq. (5). In the same way, the error generator of CVC does the comparison of this DOBB converter capacitor (${C}_{01}$) voltage (${V}_{01}^{*}$) with the original output voltage (${V}_{01}$) so as to produce an error voltage$\left({V}_{ce2}\right)$, provided by Eq. (6):
where ‘$k$’ indicates the kth sampling instance. This error voltage (${V}_{e1}$) and $\left({V}_{e2}\right)$ is delivered to an OVC and CVC for generating a regulated total output voltage (${V}_{ce1}$), and regulated capacitor output voltage $\left({V}_{ce2}\right)$, given in Eq. (7) and (8) respectively:
where ${K}_{p}$ and ${K}_{i}$ refer to the respective proportional and integral gains of the PI controller. At last, the generation of the PWM signals are done by making a comparison between the output of OVC and CVC with the highfrequency sawtooth signal (${V}_{car}$), that generates the gate signals (${V}_{gs1}$ and ${V}_{gs2}$) to DOBB converter switches (${S}_{1}$ and ${S}_{2}$).
Fig. 8. Closed loop control of DOBB converter
2.2.1. Estimation of power losses in DOBB converter
The efficiency of system is indirectly proportional to the total power losses. The total power losses, in the DOBB converter, are the conduction, switching, diode and inductor losses. Occurrence of the conduction losses is due to the declining voltage across the device as well as the current flow through the device striking in chorus. Switching losses are sustained by the concurrent occurrence of voltage and current on the device while switching. The key waveforms of DOBB converter are shown in Fig. 9. ${I}_{in}$, ${i}_{L1}$, ${i}_{D1}$, ${i}_{D2}$, and ${i}_{C1}$ are the current through the input supply, inductor ${L}_{1}$, diodes ${D}_{1}$ and ${D}_{2}$, and capacitor ${C}_{1}$ respectively. Evaluation of these losses can be done using simplified device models.
2.2.2. Calculation of switching losses of BB switch (
2.2.2.1. Conduction loss of switch (
To analyze the conduction loss of switch (${S}_{1}$), the device is simplified to be a stable voltage drop that is in series with a linear resistor (RDS on = 0.07). RDS on is based on the applied Gate Source Voltage (${V}_{GS}$) and the junction temperature. The conduction loss of switch (${S}_{1}$) is expressed in Eq. (9):
where (${I}_{S1}$) indicates the current flowing through the switch (${S}_{1}$), (${I}_{S1}$) is further divided by the respective inductor current (${I}_{S1L1}$) and capacitor current (${I}_{S1C1}$) flowing through the switch (${S}_{1}$). The current conduction of switch (${S}_{1}$) is expressed in Eq. (10):
where (${D}_{1}$) indicates the “ON” time of switch (${S}_{1}$), (${D}_{12}$) represents the capacitor (${C}_{1}$) discharged time at (${D}_{1}$), (${I}_{OL1}$) and (${I}_{OC1}$) stand for the inductor and capacitor current at the beginning. Then ($\u2206{I}_{OL1}$) and ($\u2206{I}_{OC1}$) stand for the respective average ripple current of inductor and capacitor as expressed in Eq. (11):
$\u2206{I}_{OC1}=\frac{{I}_{OC1max}{I}_{OC1min}}{2}=\frac{9.50}{2}=4.75,$
where (${I}_{OL1max}$), (${I}_{OL1min}$) represents the maximum and minimum amplitude of inductor (${L}_{1}$) current. In the same way (${I}_{OC1max}$), (${I}_{OC1min}$) represents the maximum and minimum amplitude of capacitor (${C}_{1}$) current as illustrated in Fig. 9. It is evidently noticed from Fig. 10, that ${D}_{1}=$ 0.3, ${D}_{12}=$ 0.2, ${I}_{OL1}=$ 0, ${I}_{OC1}=$ 0, $\u2206{I}_{OL1}=$ 5.35 and $\u2206{I}_{OL1}=$ 4.75. These values are substituted in Eq. (10) and Eq. (9), and the total current conduction and conduction loss of BB switch (${S}_{1}$) as resolved in Eq. (12):
${I}_{S1}^{2}=0.713+0.368=1.0811\text{A},{P}_{condS1}=1.0811\times 0.07=0.075\text{W}.$
Fig. 9. Open loop key waveforms of DOBB converter
Fig. 10. Representation of key waveforms during switch (${S}_{1}$)
2.2.2.2. Turnon and turnoff losses of switch (
Turnon losses are defined to be an exposure of the component to a considerable amount of voltage and the current experienced simultaneously when the device turned on. In the same way, turnoff losses can also be defined to be an exposure of the component to a considerable amount of voltage and the current simultaneously experienced when the device is turnedoff. Switching losses are produced as a consequence of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) simultaneously getting exposed to a high voltage and current while a transition happens between the open and the closed states. Hence it is enough to know about the duration and the kind of a transition, for instance resistive or inductive. The electrical characteristics of switch IRFZ24N (${t}_{r}=$ 34 $ns$, ${t}_{f}=$ 27 $ns$, ${V}_{DS1}=$ 18 V) are utilized for simulation study and calculation of theoretical efficiency. The Turnon and Turnoff of ${S}_{1}$ Losses (${P}_{TurnS1}$) is computed by Eq. (13):
where ${t}_{r}$ is Rise time, ${t}_{f}$ is Fall time, ${I}_{S1}^{2}$ refers to Current conduction of switch (${S}_{1}$) (refer Eq. (12)), ${V}_{DS1}$ stands for drain voltage of switch (${S}_{1}$) and, ${F}_{sw}$ is operating switching frequency (5 kHz).
The total power losses of switch (${S}_{1}$) is expressed in Eq. (14):
2.2.3. Calculation of losses in power sharing switching (
2.2.3.1. Conduction loss of switch (
To analyze the conduction loss of ${S}_{2}$, the device is simplified to be a stable voltage drop that is in in series with a linear resistor (RDS on = 0.07). RDS on is based on the applied VGS and the junction temperature. The conduction loss of switch (${S}_{2}$) is expressed in Eq. (15):
where (${I}_{S2}$) indicates the current flowing through the switch (${S}_{2}$), (${D}_{2}$) stands for the “ON” time of switch (${S}_{2}$), (${I}_{OS2}$) represents the switch (${S}_{2}$) current at time of starting, and ($\u2206{I}_{OS2}$) stands for the average ripple current of switch (${S}_{2}$). The switch current at the beginning instant (${I}_{OS2}$) is derived from Eq. (16):
The average ripple current ($\u2206{I}_{OS2}$) is observed from Eq. (17):
where (${I}_{OS2max}$), (${I}_{OS2min}$) represents maximum and minimum amplitude of switch (${S}_{2}$) current as illustrated in Fig. 10. It is seen from Fig. 11, that ${D}_{2}=$ 0.22,${I}_{OS2}=$ 7.565 and $\u2206{I}_{OS2}=$ 0.965, which are substituted in Eq. (15), the total current conduction and conduction loss of power sharing switch (${S}_{2}$) as resolved in Eq. (18):
Fig. 11. Representation of key waveform during switch (${S}_{2}$) conduction
2.2.3.2. Turnon and turnoff losses of switch (
The electrical characteristics of switch IRFZ24N (${t}_{r}=$ 34 ns, ${t}_{f}=$ 27 ns, ${V}_{DS2}=$ 34 V) are utilized for the purposes of simulation studies and calculation of theoretical efficiency. The switch (${S}_{2}$) Turnon and Turnoff losses (${P}_{TurnS2}$) is computed by Eq. (19):
where ${I}_{S2}^{2}$ refers to current conduction of switch (${S}_{2}$) (refer Eq. (18)), ${V}_{DS2}$ is: drain voltage of switch (${S}_{2}$) and ${F}_{sw}$ is$$ Operating switching frequency (10 kHz)
The total power losses of switch (${S}_{2}$) is obtained from Eq. (20):
2.3. Loss of diode (
For the diode (${D}_{1}$), the loss due to forward voltage (${V}_{F1}=$ 0.8) is expressed by Eq. (21):
where (${I}_{D1}$) indicates the current flow through the diode (${D}_{1}$), (${D}_{d1}$) stands for the “ON” time of diode (${D}_{1}$), (${I}_{OD1}$) refers to the diode (${D}_{1}$) current at the time of starting and ($\u2206{I}_{OD1}$) stands for the average ripple current of diode (${D}_{1}$). The diode current at the beginning instant (${I}_{OD1}$) equals to zero, therefore the average ripple current ($\u2206{I}_{OD1}$) is obtained from Eq. (22):
where (${I}_{OD1max}$), (${I}_{OD1min}$) indicates the maximum and minimum amplitude of diode (${D}_{1})$ current as illustrated in Fig. 11. It can be seen clearly from Fig. 12, that ${D}_{d1}=$ 0.15, ${I}_{OD1}=$ 0 and $\u2206{I}_{OD1}=$ 3.25. These values are substituted in Eq. (21), the total current conduction and the power loss of diode (${D}_{1})$ as resolved in Eq. (23):
2.4. Loss of diode (
For the diode (${D}_{2}$), the loss due to forward voltage (${V}_{F2}=$ 0.8) is provided by Eq. (24):
where (${I}_{D2}$) indicates the current flow through the diode (${D}_{2}$), (${D}_{d2}$) stands for the “ON” time of diode (${D}_{2}$), (${I}_{OD2}$) refers to the diode (${D}_{2}$) current at the time of starting, and ($\u2206{I}_{OD2}$) stands for the average ripple current of diode (${D}_{2}$). The diode current at the instant (${I}_{OD2}$) of starting equals to zero, hence the average ripple current ($\u2206{I}_{OD2}$) is derived from Eq. (25):
where (${I}_{OD2max}$), (${I}_{OD2min}$) represent the maximum and minimum amplitude of diode (${D}_{2})$ current as illustrated in Fig. 13. It is observed from Fig. 12 that ${D}_{d2}=$ 0.19, ${I}_{OD2}=$ 0 and $\u2206{I}_{OD2}=$ 4.75. These values are substituted in Eq. (24), the total current conduction and the power loss of diode (${D}_{2})$ as is done in Eq. (26):
2.5. Loss of inductor (
Losses in an inductor are contributed by two factors. One factor is the wire loss and the second one is the core loss. The loss because of the wire is provided by Eq. (27):
where (${I}_{L1}$) stands for the current flow through the inductor (${L}_{1}$), (${D}_{L1}={D}_{1}+{D}_{2}+{D}_{d1}$) indicates the “ON” time of inductor (${L}_{1}$), (${I}_{OL1}$) refers to inductor (${L}_{1}$) current at time of starting, (${R}_{dcL1}=$ 0.9) stands for the equivalent dc resistance of 0.1 mH Ferrite core inductor and ($\u2206{I}_{OL1}$) refers to the average ripple current of inductor (${L}_{1}$).
Fig. 12. Representation of key waveform during the conduction of diode (${D}_{2}$)
Fig. 13. Representation of key waveform during diode (${D}_{2}$) conduction
The inductor current at the instant of starting (${I}_{OL1}$) equals to zero, therefore the average ripple current ($\u2206{I}_{OL1}$) is observed from Eq. (28):
where (${I}_{OL1max}$), (${I}_{OL1min}$) represent the maximum and minimum amplitude of inductor (${L}_{1})$ current as illustrated in Fig. 14. shows clearly that ${D}_{L1}=$ 0.67, ${I}_{OL1}=$ 0 and $\u2206{I}_{OL1}=$ 5.25. These values are substituted in Eq. (27), the total current conduction and power loss of inductor (${L}_{1})$ are resolved in Eq. (29):
2.6. Total power losses in DOBB converter
The total power losses in DOBB converter is the summation of all the factors mentioned above. The total power losses (${T}_{L}$) and system efficiency can be calculated making use of Eq. (30):
where, ${P}_{DOBB}is$ Output power of DOBB converter (40 W) and ${T}_{L}$ refers to total power losses
Fig. 14. Representation of key waveform during the conduction of inductor (${L}_{1}$)
3. Results and discussion
To find out the performance of the proposed converter under the present control strategy, MATLAB simulations in different conditions with symmetrical and asymmetrical output voltage variation have been performed.
The simulation parameters such as input voltage (${V}_{in}$), input current (${I}_{in}$), first output voltage, current and power of DOBB converter (${V}_{O1}$, ${I}_{O1}$ and ${P}_{O1}$) respectively, second output voltage, current and power of DOBB converter (${V}_{O2}$, ${I}_{o2}$ and ${P}_{O2}$) respectively and total output voltage (${V}_{T}$) and total power (${P}_{T}$) are used to evaluate the performance of the proposed system as shown in Table 1.
Table 1. Simulation parameters for DOBB converter
Components and symbols

Parameters

Input inductor (${L}_{1}$)

389.4 μH

Intermediate capacitor (${C}_{1}$)

50 μF

Output capacitors (${C}_{1}$ and ${C}_{2}$)

1000 μF, 100 V

Operating switching frequency (${F}_{sw}$) of switches

${S}_{1}=$ 5 kHz, ${S}_{2}=$ 10 kHz

Load resistances (${R}_{1}$ and ${R}_{2}$)

28.8 Ω

3.1. Symmetrical output voltage control of DOBB converter
To verify the symmetrical performance of DOBB converter, input dc voltage source is considered as (${V}_{in}=$ 18 V) as shown in Fig. 15(a). The output voltages of the DOBB converter are desired to be regulated on (${V}_{O1}=$24 V and ${V}_{O2}=$ 24 V). Consequently, the total output voltage and total power are desired to be regulated on (${V}_{T}=$ 48 V) and (${P}_{T}=$ 40 W). Moreover, load resistances ($R1=R2=$ 28.8 Ω) are considered for symmetrical condition.
Fig. 15. Performance of DOBB converter under symmetrical voltage condition
a)
b)
c)
d)
e)
f)
g)
h)
e)
In Figs. 15(c) and (d), output voltages (${V}_{O1}$ and ${V}_{O2}$) are shown. As seen from this figure, the output voltages are tracked with the references values (${V}_{O1}^{*}$ and ${V}_{O2}^{*}=$ 24 V) with minimum steady state error. It is obvious that the output voltages are regulated very well. Similarly, the currents (${I}_{O1}$ and ${I}_{O2}$) drawn from load resistances ${R}_{1}$ and ${R}_{2}$ are shown in Figs. 15(e) and (f), both the loads consume 20 W power from input supply individually. Therefore, the power drawn from load resistances ${R}_{1}$ and ${R}_{2}$ are shown in Figs. 15(g) and (h). In Fig. 15(i), the total output voltage (${{V}_{T}=V}_{O1}+{V}_{O2}$) and total output power (${P}_{T}={P}_{O1}+{P}_{O2}$) are shown. As seen from this figure, voltage and power are tracked with the reference values (${V}_{T}^{*}=$ 48 V and ${P}_{T}^{*}=$ 40 W). It is obvious that the output voltage and power are regulated smoothly. Thus, the 40 W loads draw current from input dc source as is revealed in Fig. 15(b).
Fig. 16. Output voltage ripple evaluation of proposed DOBB converter
Moreover, two different switching frequencies of switches (${S}_{1}=$ 5 kHz and${S}_{2}=$ 10 kHz) are desired to be separate the inductor discharging current as three portions. The top and bottom portion of inductor current ${i}_{L1}$, energies the output capacitor (${C}_{O2}$). The middle portions of inductor current ${i}_{L1}$, energies the output capacitor (${C}_{O1}$). Thus, it will reduce the output ripple considerably as shown in Fig. 16. Moreover, switching losses and conduction losses of switch ${S}_{1}$ and ${S}_{2}$ are analysed with respective switching frequency and duty cycle as shown in Fig. 17. The switching frequency of the solidstate switches is kept on the order of ${S}_{1}=$ 5 kHz, ${S}_{2}=$ 10 kHz for proper operation. Such high switching frequency causes high switching losses in the switch ${S}_{2}$.
Fig. 17. Analysis of losses in switches ${S}_{1}$ and ${S}_{2}$ with respective switching frequency and duty cycle
a) Switching losses vs. Switching frequency
b) Conduction losses vs. Duty cycle
3.2. Simulated comparison of two conventional converter with the proposed DOBB
To identify the limitations of conventional converters Nami et al. [7] and Boora et al. [8], the output voltages of the conventional converters are desired to be regulated on (${CO}_{1}=$ 24 V, ${CO}_{2}=$ 24 V i.e. ${V}_{T}=$ 48 V) from 0 to 0.4 Sec. After 0.4 sec, the output voltages are desired to be regulated on (${V}_{01}=$ 18 V, ${V}_{02}=$ 30 V$$i.e. ${V}_{T}=$ 48 V) respectively as shown in Figs. 18 and 19. For this analysis input dc voltage source is considered to be 18 V and load resistances are considered to be ${R}_{1}={R}_{2}=$ 28.8 OHM.
Fig. 18. Figure performance of Nami et al. (2010) converter when ${V}_{01}<{V}_{02}$
Fig. 19. Performance of [8] converter
Observing from Figs. 18 and 19 conventional converters [7, 8] output voltages (${CO}_{1}=$ 24 V, ${CO}_{2}=$ 24 V i.e. ${V}_{T}=$ 48 V) are regulated very well at symmetrical condition. But in asymmetrical condition, which is ${V}_{O1}<{V}_{O2}$, not able to follow the output voltage as proved. Because the output capacitor ($C{O}_{1}$) has the individual charging ability but another capacitor ($C{O}_{2}$) does not have the individual charging ability. Alternatively, the proposed DOBB converter has the individual charging ability of both capacitors ($C{O}_{1}$, $C{O}_{2}$). Therefore, DOBB converter follows the reference voltages at both symmetrical and asymmetrical conditions as shown in Fig. 20.
Fig. 20. Performance of DOBB converter
Table 2. Voltage control ability of conventional and proposed converters
Converter presented by [7]


Switching states

States of output capacitors


${S}_{1}$

${S}_{2}$

–

${CO}_{1}$

${C}_{O2}$

1

0

–

Discharge

Discharge

0

0

–

Charge

Charge

0

1

–

Charge

Discharge

Converter presented by [8]


Switching states

States of output capacitors


${S}_{1}$

${S}_{2}$

${S}_{3}$

${CO}_{1}$

${C}_{O2}$

0

0

0

Charge

Charge

0

0

1

Charge

Discharge

0

1

0

Discharge

Discharge

1

0

1

Charge

Discharge

1

0

0

Charge

Charge

1

1

0

Discharge

Discharge

Proposed DOBB converter


Switching states

States of output capacitors


${S}_{1}$

${S}_{2}$

–

${CO}_{1}$

${C}_{O2}$

0

1

–

Charge

Discharge

1

0

–

Discharge

Charge

0

0

–

Charge

Discharge

The voltage control ability of conventional and proposed converters is estimated using Table 2. It is obvious from the table that in [7] the output voltage ($C{O}_{2}$) is greater than ($C{O}_{1}$) the reason is that the output capacitor ($C{O}_{1}$) has the individual charging ability at switching states (0, 1), but the output capacitor ($C{O}_{2}$) does not have the individual charging ability at all the three switching states, therefore second output voltage ($C{O}_{2}$) always depends on first output voltage ($C{O}_{1}$). Similarly, in the study by [8] the output capacitor ($C{O}_{1}$) has the individual charging ability at switching states (0, 0, 1) and (1, 0, 1). But the output capacitor ($C{O}_{2}$) does not have the individual charging ability at all the six switching states, therefore second output voltage ($C{O}_{2}$) always depends up on the first output voltage ($C{O}_{1}$). Moreover, in [8] not able to control the output voltage ($C{O}_{2}$) is greater than ($C{O}_{1}$) but in DOBB converter the output capacitors ($C{O}_{1}$) and ($C{O}_{2}$) have the individual charging ability at switching states (0, 1) and (1, 0) respectively. It is one of the main advantages of the proposed DOBB converter.
The proposed DOBB converter topologies are compared with respect to their component count, type of conversion, possibility of output voltage control, switching states and driver circuit complexity. Table 3 presents a comparison between topologies of interest. It should be noted that the converter presented by [7] has the lowest number of semiconductor devices in the current conduction path. However, it has three main disadvantages: a stepup conversion is only possible, the second output voltage ($C{O}_{2}$) always equal/lesser than the first output voltage ($C{O}_{1}$), and separate grounding of switches leads to an individual power supply for driver circuit. Similarly, the converter presented by [8] has three main disadvantages: a higher component count, the second output voltage ($C{O}_{2}$) is always equal/lesser than the first output voltage ($C{O}_{1}$) and separate grounding of switches. Finally, these disadvantages can be minimized by implementing DOBB converter which has many advantages: stepup and stepdown conversions are possible, lower component count and both the output capacitor voltages (${VO}_{1}$ or $V{O}_{2}<{V}_{t}$) is controllable. Further common grounding switches present in DOBB converter reduces power supply, noise emission problems and improves the efficiency of it.
Table 3. Performance comparison of the conventional and proposed DOBB converters with various objects
Various dual output converters


Objects

Converter presented
by [7]

Converter presented by [8]

Proposed DOBB
converter

Total number of switches

2

3

2

Total number of diodes

2

3

2

Total number of capacitors

2

2

3

Total number of inductors

1

1

1

Total number of components

7

9

8

Type of conversion

(Stepup)

(Both stepup and stepdown)

(Both stepup and stepdown)

Switching states complexity

Simple

Complex

Simple

Driver circuit complexity

Medium

Complex

Simple

Table 4. Time domain analysis of output voltage under step change in input and load conditions
Step
change in

${v}_{in}$ (v)

Applied load in %

${v}_{T}$ (v)

Over shoot (v)

Rise time (ms)

Settling time (ms)

Steady state error (mv)

Delay time (ms)

Input

18

100

048

15

2.44

124

340

1.5

36

100

48

7

–

93

460

–


Load

18

100

048

14

2.4

124

340

1.5

18

50

48

1.1

1.7

48

250

–

3.3. Algorithm of repetitive control and feedforward compensation control
The repetitive compensator is the compensator which adds the input signal to the output one which delays the input one by only one cycle $Tr$. In this research, in order to realize the repetitive compensator by DSP, we have to design it by the discrete system. Fig. 5 shows the fundamental operation of the repetitive compensator and the time leading element in the discrete system. As shown in Fig. 5, the repetitive compensator consists of $N$ memories, and in the case the control period is $T\text{'}$, and the relation of $Tr=NT\text{'}$ is derived. As this control system, in the case the period of the input signal (ripple torque) $Tr$ synchronizes with the rotation speed of the brushless DC motor, the number of N also change with change of $Tr$, in the system fixed the control period $T\text{'}$ inconveniently. Then, $T\text{'}$ is allowed to change and the repetitive compensator with $N$ memories in one period $Tr$ is realized by synchronizing the control period $T\text{'}$ with the rotation angle of the rotor $qre$. The input signal to the repetitive compensator (= the output signal from the proportional compensator) is averaged within the period of $T\text{'}$ and added to the data in the corresponding memory.
3.4. Experimental results of the proposed DOBB
For verifying the efficiency of the system proposed, a low power range laboratory prototype is constructed as illustrated in Fig. 21. For the experimental arrangement, two diverse input power sources are used. A power supply with the electric specification of 18 V, 2.386 A and 42.96 W, are considered to be the input power source. The prototype parameters of proposed system are given in Table 5.
Table 5. Experimental specification of the proposed DOBB
S. No

Objects

Values

1

DC power source

18 V, 0.83 A and 42.96 W

2

Converter output voltage

48 V

3

Converter output current

0.83 A

4

Converter output power

40 W

Fig. 21. Prototype model of proposed DOBB converter system
3.5. Performance of
The input voltage (230 V) is step down to (18 V) using the transformer and converted to DC with the help of bridge rectifier and the input is fed to controller with the help of voltage regulator. The output voltage from controller is given to enhanced converter unit and the output voltage across the individual capacitor ${c}_{01}$ is displayed using the DSO. Fig. 22 shows the output waveform of the ${C}_{01}$ capacitor.
3.6. Performance of
The input voltage (230 V) is step down to (18 V) using the transformer and converted to DC with the help of bridge rectifier and the input is fed to controller with the help of voltage regulator. The output voltage from controller is given to enhanced converter unit and the output voltage across the individual capacitor ${c}_{02}$ is displayed using the DSO. Fig. 23 shows the output waveform of the ${C}_{02}$ capacitor.
3.7. Performance of switch
Fig. 24 shows the output waveform of PWM Pulses across the switches ${S}_{1}$ in the Boost mode. These PWM pulses are generated by driver circuit by means of the mode selection switches connected along with the microcontroller.
Fig. 22. ${C}_{01}$ output voltage waveform of DOBB converter: a) simulation b) experimental waveform
a)
b)
Fig. 23. ${C}_{02}$ output voltage waveform of DOBB converter: a) simulation, b) experimental waveform
a)
b)
Fig. 24. Boost voltage waveform of DOBB converter: a) simulation, b) experimental waveform PWM pulses across the switch ${S}_{1}$ in boost mode
a)
b)
3.8. Performance of switch
Fig. 25 presents output Pulses across the switches ${S}_{1}$ in the Buck mode. These PWM pulses are generated by driver circuit by means of the mode selection switches connected along with the microcontroller.
Fig. 25. Buck voltage waveform of DOBB converter: a) simulation, b) experimental waveform PWM pulses across the switch ${S}_{1}$ in buck mode
a)
b)
3.9. Performance of switch
Fig. 26 shows the output Pulses across the switches ${S}_{2}$ in the Boost mode. These PWM pulses are generated by driver circuit by means of the mode selection switches connected along with the microcontroller.
Fig. 26. Boost voltage waveform of DOBB converter: a) simulation, b) experimental waveform PWM pulses across the switch ${S}_{2}$ in boost mode
a)
b)
3.10. Performance of the switch
Fig. 27 presents the output Pulses across the switches ${S}_{2}$ in the Buck mode. These PWM pulses are generated by driver circuit by means of the mode selection switches connected along with the microcontroller.
Fig. 27. Buck voltage waveform of DOBB converter: a) simulation, b) experimental waveform PWM pulses across the switch ${S}_{2}$ in buck mode
a)
b)
4. Conclusions
In this paper, a new structure of DOBB and frequency components of vibrations has been proposed. The proposed topology extends the design flexibility and the possibility to optimise the power converter for achieving the main objectives. Compared with conventional inverter systems, the proposed system is employed with reduced voltage stress, reduced switch count and DC source count. The proposed DOBB configuration required at least two DC sources for Converter Exhaustive operations are carried out, switching losses are calculated, simulation results are carried out for symmetrical and asymmetrical output voltage. The proposed DOBB Converter is compared with the conventional one and finally, it is proved to be more efficient than the other conventional converters. In addition, the proposed methods were examined in the case of low speed drive of the brushless DC motor. However, for the higher order frequency components of the vibration and those near the sharp resonance frequency of the mechanical system, the effectiveness of the proposed vibration suppression method was small. Several analyses in terms of cost, semiconductor loss and harmonics have been made and it is inferred that the proposed structure can be an appropriate aspirant for power converters used in industrial and drive applications.
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